PATENTS
- R.
F. Scott, R. J. Strain, "Methods of Preparing a Cadmium Sulfide Thin
Film from an Aqueous Solution," U. S. Patent No.
3,530,053 (1970).
- C.
P. Sandbank, R. J. Strain, "Optical Device for Responding to
Difference Frequency of Incident Light Beams," U. S.
Patent No. 3,530,299 (1970).
- R.
J. Strain, "Solid-State Display Device Employing Continuous Phosphor
Layers," U. S.
Patent No. 3,531,585 (1970).
- R.
J. Strain, "Cyclotron Resonance Phototube Having Axial Magnetic
Field and Transverse Electric Field," U. S. Patent No.
3,549,891 (1970).
- R.
H. Krambeck, P. T. Panousis,
R. J. Strain, "Electronic Switch Utilizing a Semiconductor with Deep
Impurity Levels," U.
S. Patent No. 3,654,531 (1972).
- R.
H. Krambeck, R. J. Strain,
"Compensating Circuit for Semiconductive
Apparatus," U.
S. Patent No. 3,831,041 (1974).
- D.
J. Silversmith, R. J. Strain, "Detection, Inversion, and
Regeneration in Charge Transfer Apparatus," U. S. Patent No.
3,838,438 (1974).
- R.
H. Krambeck, G. E. Smith, R. J. Strain,
"Conductively Connected Charge Coupled Devices," U. S.
Patent No. 3,906,542 (1975).
- G.
E. Smith, R. J. Strain, "Two and Four Phase Charge Coupled Devices,"
U. S.
Patent No. 3,921,195 (1975).
- R.
J. Strain, K. K. Thornber, "Transfer
Filter for Charge Transfer Devices," U. S. Patent No.
3,925,806 (1975).
- R.
J. Strain, R. H. Walden, "Analog Inverter for Use in Charge Transfer
Apparatus," U.
S. Patent No. 3,935,477 (1976).
- G.
E. Smith, R. J. Strain, "Method of Fabricating Polysilicon
Electrodes," U.
S. Patent No. 4,347,656 (1982).
- R.
C. Varshney, R. J. Strain,
"Identification of Repaired Integrated Circuits," U. S.
Patent No. 4,480,199 (1984).
- K.
Anand, R. J. Strain, "Ion Implantation
to Increase Emitter Energy Gap in Bipolar Transistors," U. S.
Patent No. 4,559,696 (1985).
- R.
J. Strain, "Process for Fabricating Optical Wave-Guiding Components
and Components Made by the Process," U. S. Patent No.
4,585,299 (1986).
- R.
J. Strain, "Method for Making a CMOS Circuit Having a Reduced
Tendency to Latch by Controlling the Band-Gap of Source and Drain
Regions," U. S.
Patent No. 4,603,471 (1986).
- R.
J. Strain, "CMOS Circuit Having a Reduced Tendency to Latch," U. S.
Patent No. 4,728,998 (1988).
- W.
D. Llewelyn, R. J. Strain, "Multiple
Gap Read/Write Head for Data Storage Devices,"
U. S.
Patent No. 5,426,539 (1995).
- S.
Aronowitz, R. J. Strain, "Defect Free
Bipolar Process," U. S. Patent No. 5,453,389 (1995).
- R.
J. Strain, M. H. Manley, "Memory with Multiple Erase Modes," U. S.
Patent No. 5,517,453 (1996).
- W.
D. Llewellyn, R. J. Strain, "Multiple Gap Read/Write Head For
Data Storage Devices," U.
S. Patent No. 5,644,457 (1997).
- R.
J. Strain, "Tunable Microelectromechanical
System Resonator," U.
S. Patent No. 5,729,075 (1998).
- W.
D. Llewellyn, R. J. Strain, "Method of Reading
and Writing Data on a Magnetic Medium," U. S. Patent No.
5,912,779 (1999).
- I.
Nachumovsky, Y. Nissan-Cohen, and R. J.
Strain, "Multi-bit Programmable Memory Cell Having Multiple
Anti-fuse Elements," U.
S. Patent No. 6,590,797 (2003).
- I.
Nachumovsky, Y. Nissan-Cohen, and R. J.
Strain, "Mask Programmable Read-Only Memory (ROM) Cell," U. S.
Patent No. 6,809,948 (2004).
- S.
Levin,
S. Shapira, I. Noat, R. J. Strain, Y. Netzer, "Cobalt Silicide
Schottky Diode on Isolated Well ," U. S. Patent No. 7,485,941
(2009).
- S.
Levin,
S. Shapira, I. Noat, R. J. Strain, Y. Netzer, "Gate Defined Schottky
Diode ," U. S. Patent No. 7,544,557 (2009).
- A.
K.
Kapoor, R. Strain, R. Marko, "Apparatus and Method for Improving
Drive-strength and Leakage of Deep Submicron MOS Transistors," U. S.
Patent No. 7,683,433 (2010).
- R.
Strain,
"Apparatus For Using A Well Current Source To Effect A Dynamic
Threshold Voltage Of A MOS Transistor," U. S. Patent No. 7,863,689
(2011).
- A.
K.
Kapoor, R. Strain, R. Marko, "Apparatus and Method for Dynamic
Threshold Voltage Control of MOS Transistors in Dynamic Logic
Circuits," U. S. Patent No. 7,898,297 (2011).
- A.
K.
Kapoor, R. Strain, R. Marko, "Method for Reducing Leakage Current
and Increasing Drive Current in a Metal-Oxide Semiconductor (MOS)
Transistor ," U. S. Patent No. 8,048,732 (2011).
- A.
K.
Kapoor, R. Strain, "Apparatus and Method for Improved Leakage
Current of Silicon On Insulator Transistors Using a Forward Biased
Diode," U. S. Patent No. 8,247,840 (2012).
- A.
K. Kapoor, R. Strain, "Reduced Variation MOSFET Using a
Drain-extension-last Process," U. S. Patent 9,379,214 (2016).
- R. Strain, A.
Asenov, "Fluctuation Resistant FinFET," U. S. Patent 9,847,404
(2017).
- M.
Thomas, R Strain, “FFT-DRAM,” U. S. Patent 11,373,696 (2022).
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